Three-phase pulse supply
This project is about creating a high-current 3-phase pulsed power inverter.
- PulseDriver product files at groupkos.com/science2
Note: the new first choice is not a direct replacement, and is only available as a passivated silicon die
- 2nd choice – Power MOSFET
- Power MOSFET FDP025N06 Datasheet (PDF)
- 1st choice – Gallium Nitride (GaN) transistors (faster) are now available from DigiKey. 
- Gate Driver
- Over-voltage protector
- Rail Anti-ring capacitors
- Ceramic Capacitor: 100000PF 50V Z5U RADIAL
- Proto-Strip prototyping copper clad circuit board
- Solder point prototypical assembly
Operating as an inverter, a 12 volt D.C. supply is chopped to three separate phased-outputs separated 120 degrees apart.
These outputs are gated to remain on only during an adjustable on-time duration.
The on-time of each phase output is a maximum of 1/3 of the 3-phase cycle (120 degrees), adjustable to a minimum pulse-width of near zero.
The on-time of each pulse is triggered to start at 0, 120, and 240 degrees into each 3-phase cycle. The pulse on-time adjustment is set with one resistor and one capacitor.
The 3-phase signal is generated as six states shifting in a Johnson Counter (a Moebius loop connected 3-stage shift registers). Three logic symmetry gates each detect one of three register states that mark the beginning of each of the three output phases. An additional error-correction gate ensures that neither start-up or transient noise places the shift-registers into a disallowed logic pattern that produces incorrect phasing symmetry.
The master clock runs at a rate six times higher than the 3-phase frequency desired, adjustable by a range set with one resistor and one capacitor as the frequency adjustment. The master clock is toggled by a selector switch to multivibrator (free running) or monostable (one shot) modes. A second monostable mode is selected, a momentary-on switch will produce one pulse per push. Six pulses are needed to cycle through all three output states.
A second monostable oscillator is triggered once per master clock cycle to generate a pulse with adjustable duration per master clock cycle. The adjustment is controlled by one variable resistor and one capacitor. The adjustable pulse serves to gate the 3-phase output of the symmetry gates to implement duty cycle adjustment of the 3-phase output signals.
The output signals are feed to MOSFET gate drivers designed to swing the power MOSFET transistor gates from rail to rail to improve the switching time of the power MOSFETs. The gate drivers also are designed to operate in low impedance connection to the gates to minimize gate capacitance delay and further improve MOSFET switching times.
These components represent the state of the art in high-performance power MOSFET switches available circa 2009.
Anticipated operation will switch 12 volts on and back off in a few micro-seconds if the load inductance is nearly resistive. Very high current, over 1000 amps, is possible for very brief periods, such as may be realized with very shrot on times --to the thermal limit of the package.
Alternatively, heavy gauge one-loop conductor coils that are wound in parallel may provide a very low resistance for testing. See Coil-winding Calculations Table (MS Excel).
- Precision over-voltage protection from inductive loads actively switched at 0.7 volts from the power supply rails using TVS component.
- Datasheet LittleFuse Transient Voltage Suppressor (TVS) SCR-Diode array (PDF)
The power supply is filtered at the source with capacitors choosen for their ability to move current quickly. These capacitors are used to prevent ringing into the power supply rails as will occur under nanosecond switching slew rates.
- 10 uF ring-suppressor capacitors mounted near the MOSFET switch (Polystyrene or similar low internal reactance (effective resistance at frequency)
- 0.1 uF ring-suppressor capacitors mounted near the MOSFET switch
- Links provided by Chaz of GreenGlow Yahoo forum.
- datasheet for the Gallium Nitride (GaN) Transitor EPC1015: http://epc-co.com/epc/documents/datasheets/EPC1015_datasheet_final.pdf. "Gallium Nitride is grown on Silicon Wafers and processed using standard CMOS equipment leveraging the infrastructure that has been developed over the last 55 years. GaN’s exceptionally high electron mobility and low temperature coefficient allows very low RDS(ON), while its lateral device structure and majority carrier diode provide exceptionally low QG and zero QRR. The end result is a device that can handle tasks where very high switching frequency, and low on-time are beneficial as well as those where on-state losses dominate."